XYALIS, an Electronic Design Automation (EDA) company, offers specialized tools in the area of Design for Manufacturing. XYALIS main tools includes CMP metal-fill and MCM and MPW layout optimization. These tools brings advanced solution to the most important DFM issues found during the design and the mask preparation. XYALIS tools also increase engineering productivity during tape-out and help reduce time to manufacturing.

Since 1995, a Chemical-Mechanical Polishing (CMP) step has been adopted in the semiconductor manufacturing process to flatten wafer surface between each metal layer. Metal density variations can badly impact this CMP process, thus the need for designers to insert “dummy tiles” into there design to help flatten the surface for each metal layer.

Since the beginning of the company, XYALIS has provided metal-fill tools to address this issue. The first member of this family has been GTtiler. This tool has been in production use at major semiconductor site around the world for many years and has successfully completed a very high number of design tape-outs. It still provides the highest processing speed and the lowest database expansion factor.

In 2002 XYALIS introduced GTsmooth, a model-based CMP process estimator and dummy tiles insertion tool. The approach of inserting “dummy” metal tiles in all empty areas was not satisfactory because it introduced too many parasitics. Traditional methods were not successful in solving this problem and it was necessary to introduce a model based algorithm to get the best results and to minimize the number of inserted tiles while achieving the highest yield.

In 2006 XYALIS introduces GTstyle, a new tool for dummies insertion targeting 65nm processes and below. This new tool combines the advantages of the “model-based” approach while maintaining a compatibility with the design rules checks.

XYALIS is the only independent company offering a full line of products dedicated to the reticle assembly teams for wafer optimization and management. The current toolset encompasses MPW optimization and placement plus the overall wafer frame management. XYALIS tools are very robust and has been used in production for more than 5 years at major semiconductor houses without any error.

XYALIS expertise and its success history are quite unique in the EDA industry. From the beginning, the company has focused on Design For Manufacturing tools and solutions to solve complex problems found between design and manufacturing. This area is now called DFM and is popular in the papers and symposiums. Thanks to its founders who have a very deep knowledge and experience in this field XYALIS has been able to innovate and provide new solutions to solve problems faced by engineers today.

XYALIS focuses on two main flows of the layout finishing process:

Metal filling to address Chemical Mechanical Polishing (CMP) issues
Mask data preparation
Metal Filling

Metal filling is now necessary for advanced processes in order to increase factory yield. The insertion of dummies ensures a uniform pattern distribution over chips and wafers, resulting in higher manufacturability. These additional electrically inactive polygons add parasitic effects and may impact correct design behavior and timing.

With XYALIS' solutions there is no compromise between yield improvement and design performance. Thanks to patented dummy distribution algorithms, XYALIS metal-filling solutions have been addressing the most advanced needs of the semiconductor industry.

Mask Data Preparation

XYALIS is the only independent company offering a fully integrated environment to build complex reticles as well as 1X masks, both for regular arrays of dies and for Multi Project Wafers (MPWs) or shuttles.

Built around a powerful dedicated graphical editor, the mask data preparation environment provides all the needed features to address the most ambitious mask making processes: MPW management, automatic frame generation, mask and reticle assembly, wafer map optimization.

XYALIS' solutions have been developed in cooperation with major semiconductor industry leaders and have been used in production for the most advanced processes (65nm and below).

XYALIS, a privately held company founded in 1998, is headquartered in Grenoble, France, and has opened an office in San Jose, California.